292 ATM Switching with Non-Blocking Multiple-Queueing Networks outcome of the contention phase carried by field GR: means a granted request, whereas means a denied request. In the data phase the PCs that either lose contention in the request phase, or issue an idle packet REQ, transmit an idle packet DATA, whereas the contention winners transmit a packet DATA carrying their HOL cell (see the example in Figure 8.8 referred to in the solution c' for the implementation of the routing network described in Section 3.2.3). The sorting–routing structure is K-non-blocking so that all the non-idle packets DATA reach the addressed OPC. In the example of Figures 8.7–8.8 for , the PCs issue six requests, of which two are denied: one addressing outlet 1 owing to queue saturation and one addressing outlet 5 owing to a number of requests larger than K. The same packet configura- tion of this example, applied to an IOQ switch without backpressure, has been shown in Figures 8.4–8.5: in that case five packets have been successfully switched rather than four in the BP switch due to absence of queue saturation control. Hardware structure. In the above IOQ Three-Phase switch with BP protocol and size , the K-non-blocking network is the minimum-cost implementation described in Section 3.2.3 with a Batcher sorting network cascaded through an EGS pattern onto K banyan networks . As already discussed, the only self-routing tag DA suffices in such a K-non-blocking structure to have the packet self-routing. The merge network MN receives a packet bitonic sequence, that is the juxtaposition of an address-ascending sequence of packets QUE on inlets and an address-descending sequence of packets REQ on inlets . Therefore MN can be implemented as an Omega (or n-cube) network with stages of sorting elements. The allocation network AN is a variation of the running sum adder network already described for the channel grouping application in an IQ switch (see Section 7.1.3.1) that sums Figure 8.8. Example of packet switching (Phase III) in the BP IOQ Three-Phase switch GR K< GR K≥ Network RN Network RN 1 11 15 15 1 0 1 1 0 0 1 0 5 0 1 5 0 0 7 0 AC DA 0 1 2 3 4 5 6 7 PC 0 0 0 0 0 1 0 1 00 1 1 5 5 17 PC Network SN III Data 0 1 2 3 4 5 6 7 17 AC activity DA destination address N 8 K, 2== q 1 1=() NN× NN× NN× a 0 a N 1– – a N a 2N 1– – 2N() 2 log n 1+= 22× nonbl_mq Page 292 Monday, November 10, 1997 8:38 pm Combined Input–Output Queueing 293 on partitioned sets of its inlets. Here the network size is doubled, since also the queue status information is used in the running sum. Now the allocation network has size and includes stages of adders. Its structure for and is shown in Figure 8.9. The component with inlets and , outlets and , which is referred to as an i-component, has the function of identifying the partition edges, that is the inlets with smallest and largest address carrying packets REQ with the same address DA. The network AN drops the fields AC and DA, while transferring transparently all the other fields of packets REQ and QUE except their last fields GR and QS, respectively. As long as this transparent transfer takes place, the adders are disabled, so that they start counting when they receive the first bit of GR and QS. If and denote the binary numbers 0 and 1, each with bits, the outlets of the i-component assume the following status: The 0-component always transfers transparently on the field QS or GR received on . Figure 8.9 also shows the output of the i-components and adders at each stage, when the run- ning sum is actually performed with the same pattern of packets of Figure 8.7. The concentration network CN is required to route N packets from N inlets out of the 2N inlets to the top N outlets . The outlets requested by the packets REQ represent a monotonic sequence of increasing addresses, as is guaranteed by the pattern of indices written in field CI by SN and by the topological mapping between adjacent networks. Therefore it can easily be shown that CN can be implemented as a reverse n-cube network with stages. In fact, if we look at the operations of the concentrator by means of a mirror (inlets becomes outlet and viceversa, the reverse n-cube network becomes an n-cube network) the sequence of packets to be routed to the outlets of the mirror network is compact and monotone (CM sequence) and thus an n-cube network, which is functionally equivalent to an Omega network, accomplishes this task (see Section 3.2.2). As in all the other applications of the three-phase algorithm, an internal channel rate bit/s higher than the external rate C bit/s must be used since the request, acknowledgment and data phases share the same hardware. The switching overhead factor is computed assuming the same hypotheses (e.g., each sorting/switching/adding stage accounts for a 1-bit latency) and following the same procedure as for the IQ switch (Section 7.1.1.1). Therefore, we would come up with the latencies in SN, in MN and in AN for the request phase as well as in CN and in SN for the acknowledg- ment phase. Since the length of the six fields in a packet REQ sums up to bit, then the total duration of the first two phases is 2N 2N× k' K 2 log= N 8= 5 K 8≤≤ c i 1– c i reset i info i 0() b 1() b k' 1+ 1 iN1–≤≤() r eset i low if DA c i () DA c i 1– () or AC c i 1– ()0=≠ high if DA c i () DA c i 1– () and AC c i 1– ()0==    = info i QS c i () if PI c i () 0= 0() b if PI c i () 1= PI c i 1– ()0=, 1() b if PI c i () 1= PI c i 1– ()1=,      = info 0 c 0 2N 2N× d 0 d 2N 1– – e 0 e N 1– – N 2 log 1+ C 1 η+() η nn 1+()2⁄ n 1+ k' n 1+ nn 1+()2⁄ 1 n 1 nnk' 1+++++ + T III– nn 6+()2k' 5++ N 2 log N 2 log 6+()2 K 2 log 5++== nonbl_mq Page 293 Monday, November 10, 1997 8:38 pm Combined Input–Output Queueing 295 For and , the overhead factor is (the data phase lasts bit times). Such an overhead, which is higher than in a multichannel switch (see Section 7.1.3.1), can be reduced by pipelining as much as possible the transmission of the different packets through the interconnection network. According to the procedure explained in [Pat90], a reduced duration of the first two phases is obtained, , which gives an overhead for the same network with and . 8.1.2. Performance analysis The analysis of a non-blocking switch with input and output queueing (IOQ) is now performed under the random traffic assumption with average value of the offered load p . The analysis relies as in the case of pure input queueing on the concept of virtual queue defined as the set of HOL positions in the different input queues holding a cell addressed to outlet i. A cell with outlet address i entering the HOL posi- tion also enters the virtual queue . So, the capacity of each virtual queue is N (cells). The virtual queue feeds the output queue , whose server is the switch output . A graphical representation of the interaction among these queues is given in Figure 8.10. The analysis always assumes a FIFO service in the input, virtual and output queue and, unless stated otherwise, an infinite switch size is considered . Thus the number of cells entering the virtual queues in a slot approaches infinity and the queue joined by each such cell is independently and randomly selected. Furthermore, since the arrival process from individual inlets to a virtual queue is asymptotically negligible, the interarrival time from an input queue to a virtual queue becomes sufficiently long. Therefore, the virtual queues, the output queues, as well as the input queues, are mutually independent discrete-time systems. Owing to the random traffic assumption, the analysis will be referred to the behavior of a generic “tagged” input, virtual and output queue, as representative of any other queue of the Figure 8.10. Queue model for the non-blocking IOQ switch N 1024= K 4= η T III– T III ⁄ 0.399== 53 8⋅ T III– nn 11+()2⁄ 2k' 3++= η 0.264= N 1024= K 4= NN× 0 p< 1≤() VQ i i 0 … N 1–,,=() VQ i VQ i OQ i O i j j k j Virtual queue Output queuesInput queues I i j n n I h O i O j O m I k N ∞=() nonbl_mq Page 295 Monday, November 10, 1997 8:38 pm 296 ATM Switching with Non-Blocking Multiple-Queueing Networks same type. Let , and denote the probability that a packet is offered to the tagged input queue, that a packet leaves the tagged input queue and that a packet leaves the tagged output queue, respectively. If the external offered load is p, then . As usual, the three main performance parameters will be computed, that is the switch capacity , the average packet delay T and the packet loss probabil- ity π . These two latter measures will be computed as (8.1) (8.2) where η denotes a waiting time, δ a queueing time (waiting plus service) and the subscripts i, v and o indicate the input, virtual and output queue, respectively. Note that denotes the time it takes just to enter the HOL position in the input queue, as the waiting time before winning the output contention is represented by . The analysis will be first developed for the case of an output queue size equal to the speed- up factor and infinite input queues and then extended to the case of arbitrary capacities for input and output queues. 8.1.2.1. Constrained output queue capacity Our aim here is to analyze the IOQ switch with backpressure, output queue capacity equal to the switch speed-up and very large input queue size , so that [Ili90]. Note that the selected output queue capacity is the minimum possible value, since it would make no sense to enable the switching of K packets and to have an output queue capac- ity less than K. Rather than directly providing the more general analysis, this model in which the output queues has the minimum capacity compatible with the switch speed-up has the advantage of emphasizing the impact of the only speed-up factor on the performance improvements obtained over an IQ switch. Let us study first the tagged input queue, which is fed by a Bernoulli process. Therefore it can be modelled as a queue with arrival rate and service time given by the waiting time it takes for the tagged packet to begin service in the tagged virtual queue plus the packet transmission time, that is . Using a well-known result [Mei58] about this queue, we get (8.3) in which the first and second moment of the waiting time in the virtual queue are obtained from the study of the tagged virtual and output queue. Let us introduce the following notations: number of packets entering the tagged virtual queue at the beginning of slot m; number of packets in the tagged virtual queue after the packet switch taking place in slot m; p i p v p o p i p= ρ max ρ max 1≤() T 1≥() 0 π 1≤≤() TEη i [] E η v []E δ o []++= π 1 p o p i – 11π i –()1 π o –()– π i π o π i π o –+== = η i η v B o K=() B i ∞=() p v p i = Geom G 1⁄⁄ p i p= θ i η v θ i η v 1+= E η i [] p i E θ i θ i 1–()[] 21 p i E θ i []–() p i E η v 2 []E η v []+() 21 p i E η v 1+[]–() == A m R m nonbl_mq Page 296 Monday, November 10, 1997 8:38 pm Combined Input–Output Queueing 297 number of packets switched from the tagged virtual queue to the tagged output queue in slot m; number of packets in the tagged output queue at the end of slot m, that is after the packet switch taking place in slot m and after the eventual packet transmission to the corresponding switch outlet. Based on the operations of the switch in the BP mode, the state equations for the system can be easily written (an example is shown in Figure 8.11 for ): (8.4) These equations take into account that the packet currently transmitted by the output queue to the switch outlet occupies a position of the output queue until the end of its transmission. Then, the cumulative number of packets in the tagged virtual queue and tagged output queue is given by (8.5) Note that according to this equation, if one packet enters an empty tagged virtual queue and the output queue is also empty, then . In fact, the packet is immediately switched from the tagged virtual queue to the tagged output queue, but the packet spends one slot in the tagged output queue (that is the packet transmission time). Since implies , Equation 8.5 can be written as (8.6) Figure 8.11. Example of tagged VQ-OQ switching for B o =K V m Q m R m 1– 0 Q m 1– ,> 3 B o , 3== R m R m 1– A m V m –+= V m min B o max 0 Q m 1– 1–,{}– R m 1– A m +,{}= Q m max 0 Q m 1– 1–,{}V m += Q m-1 R m-1 T m-1 V m A m R m T m Q m Virtual queue Output queue T m T m R m Q m + R m 1– max 0 Q m 1– 1–,{}A m ++== T m 1= Q m 0= R m 0= T m max 0 R m 1– Q m 1– 1–+,{}A m + max 0 T m 1– 1–,{}A m +== nonbl_mq Page 297 Monday, November 10, 1997 8:38 pm 298 ATM Switching with Non-Blocking Multiple-Queueing Networks As with pure input queueing, the procedure described in [Kar87] enables us to prove that the random variable , also representing the number of packets becoming HOL in their input queue and addressing the tagged output queue, has a Poisson distribution as . Since Equation 8.6 describes the evolution of a single-server queue with deterministic server (see Equation A.1), the system composed by the cascade of the virtual queue and tagged out- put queue behaves as an queue with an infinite waiting list. Note that represents here the total number of users in the system including the user currently being served. In order to compute the cumulative delay spent in the tagged virtual queue and tagged output queue, we can say that a packet experiences two kinds of delay: the delay for transmit- ting the packets still in the virtual queue arrived before the tagged packet, whose number is , and the time it takes for the tagged packet to be chosen in the set of packets with the same age, i.e. arriving in the same slot. By still relying on the approach developed in [Kar87], it is possible to show that the cumulative average delay in the tagged virtual queue and tagged output queue is given by the average delay (waiting time plus service time) of an queue with arrival rate p, that is (8.7) However, a more detailed description of the virtual queue operation is needed since the average waiting time in the input queue is a function of the first two moments of the waiting time in the virtual queue (see Equation 8.3). Since it has been proved [Ili90] that we simply have to compute the first two moments of the virtual queue content. The assump- tion greatly simplifies the computation of these two moments, since the occurrence of at least one empty position in the tagged output queue implies that the tagged virtual queue is empty. So, the only state variable fully describes the content of the two queues, which can be seen as a single queue with the first positions representing the output queue and the other N positions modelling the virtual queue (Figure 8.12). Therefore (8.8) A m N ∞→ MD1⁄⁄ T m R m 1– MD1⁄⁄ E η v []E δ o []+ p v 21 p v –() 1+= E η v [] ER[] p = E η v 2 [] ER 2 [] p = B o K= T m B o ER[] iPrT B o i+=[]⋅ i 1= ∞ ∑ iB o –()t i iB o 1+= ∞ ∑ == ER 2 [] i 2 Pr T B o i+=[]⋅ i 1= ∞ ∑ iB o –() 2 t i iB o 1+= ∞ ∑ == nonbl_mq Page 298 Monday, November 10, 1997 8:38 pm 300 ATM Switching with Non-Blocking Multiple-Queueing Networks Figure 8.13. Switch capacity of a BP IOQ switch when B o =K Figure 8.14. Delay performance of a BP IOQ switch when B o =K 0.50 0.60 0.70 0.80 0.90 1.00 0 5 10 15 20 25 30 35 IOQ BP - N=∞, B o =K Maximum throughput, ρ max Speed-up value, K 10 0 10 1 10 2 0.0 0.2 0.4 0.6 0.8 1.0 IOQ BP - N=∞, B o =K Average packet delay, T K=1 Switch throughput, ρ 24 81632 M/D/1 nonbl_mq Page 300 Monday, November 10, 1997 8:38 pm Combined Input–Output Queueing 301 In the case of infinite input queue, the previous analysis of a queue applies here too, so that the average waiting time is given by Equation 8.3, in which the first two moments of the waiting time in the virtual queue are given by definition as (8.10) Unlike the previous case of a constrained output queue size, now the distribution function is needed explicitly, since the condition makes it possible that the tagged output queue is not full and the tagged virtual queue is not empty in the same slot. The distribution of the random variable is computed later in this section. When the input queue has a finite capacity, the tagged input queue behaves as a queue with a probability of a packet arrival in a slot. Also in this case the service time distribution is general and the tagged virtual queue receives a load that can still be considered Poisson with rate , where is the cell loss probability at the input queue. An iterative approach is used to solve the queue, where rep- resents the total number of users admitted in the queue (including the user being served), which starting from an initial admissible value for , consists in • evaluating the distribution function of the service time in the input queue, which is given by the distribution function computed in the following section as a function of the current value; • finding the cell loss probability in the input queue according to the procedure described in the Appendix; • computing the new value . These steps are iterated as long as the new value of differs from the preceding value for less than a predefined threshold. The interaction among different input queues, which occurs when different HOL packets address the same output queue, is taken into account in the eval- uation of the distribution function of the waiting time in the virtual queue, as will be shown later. The packet loss probability is found by observing in each slot the process where n is the number of packets in the input queue and j is the number of time slots needed to com- plete the service of the HOL packet starting from the current slot. Note that the service time for a new packet entering the input queue is given by the above-mentioned distribution . The Markov Chain analysis of such a system is given in the Appendix which evaluates the measures of interest to us, that is the queueing delay and the packet loss probability . The analysis of virtual queue and output queue will be developed separately for the two internal protocols BP and QL. Geom G⁄ 1⁄ E η v [] nη vn, n 0= ∞ ∑ = E η v 2 [] n 2 η vn, n 0= ∞ ∑ = η vn, Pr η v n=[]≡ KB o < η v Geom G⁄ 1⁄ B i ⁄ p i p v p i 1 π i –()= π i Geom G⁄ 1⁄ B i ⁄ B i p v θ in, η vn 1–, p v π i p v p i 1 π i –()= p v π i nj,() θ in, Geom G⁄ 1⁄ B i ⁄ E η i θ i +[]E δ i []= π i nonbl_mq Page 301 Monday, November 10, 1997 8:38 pm 302 ATM Switching with Non-Blocking Multiple-Queueing Networks The BP protocol. The operations of the switch model with backpressure is illustrated by the example in Figure 8.15 for . Equations 8.4 describ- ing the system evolution still apply for the description of variables and , whereas the one describing must be modified to take into account that the speed-up too can limit the packet transfer from the virtual queue to the output queue, that is The cumulative number of packets in the tagged virtual queue and tagged output queue and the total average delay spent in the two queues are still expressed by Equations 8.6 and 8.7. As previously discussed, the evaluation of the delay and loss performance in the input queue requires the knowledge of the distribution function of the service time of the HOL cell in the input queue, which is obtained through the distribution function of the waiting time in the virtual queue. Let the couple denote the generic state of the system , , that is the tagged virtual queue and the tagged output queue hold at the end of the m-th slot i and j pack- ets, respectively, and let indicate the probability of the state . In order to compute the probability distribution that the tagged packet waits n slots before being served in the tagged virtual queue, a deterministic function is introduced: it repre- sents the number of cells that can be switched from the tagged virtual queue to the tagged output queue in n time slots starting from an initial state of j cells in the output queue. If is the system state found by the tagged packet entering the HOL position in the tagged input queue and given that it is selected as k-th among those packets entering the same virtual queue in the same slot, then (8.11) In fact, packets must be switched before the tagged packet. The evaluation of the number of packets that can be switched in n slots from the tagged virtual queue to the tagged output queue can be evaluated by computing the number of packets that can be switched in the generic slot l of these n slots . It is simple to Figure 8.15. Example of tagged VQ-OQ switching for BP operation R m 1– K Q m 1– ,> 2 K 2 ,≥ B o , 3== R m Q m V m V m min KB o max 0 Q m 1– , 1–{}– R m 1– A m +,,{}= T m Q m-1 R m-1 T m-1 V m A m R m T m Q m Virtual queue Output queue θ i η v ij,() R m i= Q m j= p ij, ij,() η vn, Pr η v n=[]≡ F nj, ij,() η vn, Pr F nj, ik+ F n 1 j,+ ≤<[]= ik1–+ F nj, f lj, ln≤() nonbl_mq Page 302 Monday, November 10, 1997 8:38 pm Combined Input–Output Queueing 303 show that is given by the minimum between the speed-up K and the number of idle posi- tions in the output queue, that is Since by definition through a simple substitution we obtain the recursive relations for : The probability distribution is then given by Equation 8.11 considering the range of variation of k and saturating on all the possible i and j values that give the state . That is (8.12) in which is the probability that the tagged packet is the k-th among the set of packets entering the virtual queue in the same slot. The factor is obtained as the probability that the tagged packet arrives in a set of i packets times the probability of being selected as k-th in the set of i packets. The former probability is again found in [Kar87] to be , in which is the probability of i arrivals in one slot given by the Poisson distribution (we are assuming the switch size ). So In order to determine the probability , we can write the equations expressing the Markov chain of the system (virtual queue, output queue). Four cases are distinguished: 1. Empty tagged virtual queue and non-saturated output queue . Here is evaluated by considering all the possible state transitions leading to state . This occurs when the system state is and packets enter the tagged virtual queue for each k from 0 to m. Since the tagged virtual queue will be empty at the end of the slot, all the k packets already in the tagged virtual queue together with the new f lj, f lj, min KB o f mj, m 1= l 1– ∑ l 1– max 0 j 1–,{}–+–,    = j 0 1 ln≤≤;≥() F nj, f lj, l 1= n ∑ ≡ n 1≥ j 0≥,() F 0 j, 0= j 0≥() F nj, F nj, min KB o F k 1 j,– k 1– max 0 j 1–,{}–+–,{} k 1= n ∑ = n 1≥ j 0≥,() η vn, ij,() η vn, b k p mk– j, k 1= m ∑ mF nj, 1+= F n 1 j,+ ∑ j 0= B o ∑ = n 0≥() b k b k 1 i⁄ ia i p v ⁄ a i N ∞= b k 1 i ia i p v ik= ∞ ∑ 1 p v a i ik= ∞ ∑ == k 1≥() a i p v i e i– i! = p ij, i 0 0 jB o 1–≤≤,=() p ij, ij,() kj m– 1+,()mk– nonbl_mq Page 303 Monday, November 10, 1997 8:38 pm [...]... =44 QL Bt = 48 10 -8 10-9 0 10 20 30 Input buffer size, Bi 40 50 Figure 8. 25 BP-QL loss performance comparison for a total buffer budget nonbl_mq Page 315 Monday, November 10, 1997 8: 38 pm 315 Combined Input–Output Queueing 8. 1.3 Architectures with parallel switching planes Rather than using an ATM network that is K-non-blocking, K switching planes ( K > 1 ) can be used to build a non-blocking ATM switch... Shared queue Om Input queues Figure 8. 38 Queue model for the non-blocking ISQ switch nonbl_mq Page 3 28 Monday, November 10, 1997 8: 38 pm 3 28 ATM Switching with Non-Blocking Multiple-Queueing Networks The analysis always assumes a FIFO service in the input, virtual and shared queue as well as an in nitely large switch ( N = ∞ ) Thus the number of cells entering the virtual queue and addressing a specific... proposal described in [Den92] overcomes this limit by proposing an architecture with combined input-shared queueing where the switch size does not limit the external nonbl_mq Page 326 Monday, November 10, 1997 8: 38 pm 326 ATM Switching with Non-Blocking Multiple-Queueing Networks link speed The architecture of the N × N switch is shown in Figure 8. 37: it includes a data section and a control section... each output queue without blocking due to internal conflicts Now the packets in excess of K addressing a specific outlet remain stored in the shared queue, whose capacity is NB s cells, to nonbl_mq Page 3 18 Monday, November 10, 1997 8: 38 pm 3 18 ATM Switching with Non-Blocking Multiple-Queueing Networks be switched in the next slot Therefore in each slot the packets contending for the N outlets (at most... Pattavina, “Design and performance evaluation of a packet for broadband central offices”, Proc of INFOCOM 90, San Francisco, CA, June 1990, pp 1252-1259 [Pat91] A Pattavina, “An ATM switch architecture for provision of integrated broadband services”, IEEE J on Selected Areas in Commun.,Vol 9, No 9, Dec 1991, pp 1537-15 48 [Pat93] A Pattavina, G Bruzzi, “Analysis of input and output queueing for non-blocking... the switch Packet sequencing cannot be guaranteed when dedicated input queues are used, each serving a single plane inlet 1 0 2 0 K N-1 N-1 Figure 8. 27 IOQ switch with multiple parallel planes and dedicated input queues nonbl_mq Page 317 Monday, November 10, 1997 8: 38 pm 317 Combined Shared-Output Queueing The windowing technique, described in Section 7.1.3.2 and aimed at reducing the throughput limitation... Qm Figure 8. 19 Example of tagged VQ-OQ switching for QL operation nonbl_mq Page 3 08 Monday, November 10, 1997 8: 38 pm 3 08 ATM Switching with Non-Blocking Multiple-Queueing Networks Unlike the BP protocol, in this case the cumulative time spent by the tagged packet in the virtual queue and output queue cannot be expressed through an M ⁄ D ⁄ 1 system, because of the difference between V m' and V m''... 10, 1997 8: 38 pm 309 Combined Input–Output Queueing and by applying Little’s formula the average waiting time in the output queue is obtained, that is Bo ∑ jqj j=0 Bo ∑ jqj j=0 E [ δ o ] = = -po 1 – q0 (8. 21) The packet loss probability π o in the output queue in the QL mode can be found considering the probability π o, l of l cells lost in a generic time slot and then computing the ratio... simulated switch and the in nite switch size of the model can be neglected In fact, it is well known (see, e.g., [Kar87], [Pat90]) nonbl_mq Page 305 Monday, November 10, 1997 8: 38 pm 305 Combined Input–Output Queueing that the maximum throughput of a non-blocking switching structure with input (or input and output) queueing converges quite rapidly to the asymptotic throughput as the switch size increases... the same input ( K i = 1 ) and output nonbl_mq Page 316 Monday, November 10, 1997 8: 38 pm 316 ATM Switching with Non-Blocking Multiple-Queueing Networks ( K o = K ) speed-up Nevertheless, note that the operation of selecting the switch plane followed by the output contention resolution in each 1-non-blocking plane is worse than operating the contention resolution first and then finding the path in a K-non-blocking . November 10, 1997 8: 38 pm 2 98 ATM Switching with Non-Blocking Multiple-Queueing Networks As with pure input queueing, the procedure described in [Kar87] enables us to prove that the random variable. Page 2 98 Monday, November 10, 1997 8: 38 pm 300 ATM Switching with Non-Blocking Multiple-Queueing Networks Figure 8. 13. Switch capacity of a BP IOQ switch when B o =K Figure 8. 14. Delay performance. Monday, November 10, 1997 8: 38 pm Combined Input–Output Queueing 305 that the maximum throughput of a non-blocking switching structure with input (or input and output) queueing converges quite rapidly