kiến trúc máy tính dạng thanh tin figs 5 the instruction set architecture level sinhvienzone com

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kiến trúc máy tính dạng thanh tin figs 5 the instruction set architecture level sinhvienzone com

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5 THE INSTRUCTION SET ARCHITECTURE LEVEL CuuDuongThanCong.com https://fb.com/tailieudientucntt FORTRAN 90 program C program FORTRAN 90 program compiled to ISA program C program compiled to ISA program Software ISA level Hardware ISA program executed by microprogram or hardware Hardware Figure 5-1 The ISA level is the interface between the compilers and the hardware CuuDuongThanCong.com https://fb.com/tailieudientucntt Address Address Bytes 15 14 13 12 11 Bytes 10 24 16 19 15 14 13 17 16 12 Aligned 8-byte word at address (a) 18 Nonaligned 8-byte word at address 12 (b) Figure 5-2 An 8-byte word in a little-endian memory (a) Aligned (b) Not aligned Some machines require that words in memory be aligned CuuDuongThanCong.com 24 16 https://fb.com/tailieudientucntt Bits 16 AH BH CH DH A X B X C X D X AL EAX BL EBX CL ECX DL EDX ESI EDI EBP ESP CS SS DS ES FS GS EIP EFLAGS Figure 5-3 The Pentium II’s primary registers CuuDuongThanCong.com https://fb.com/tailieudientucntt Register R0 R1 – R7 R8 – R13 R14 R15 R16 – R23 R24 – R29 R30 R31 Alt name G0 G1 – G7 O0 – O5 SP O7 L0 – L7 I0 – I5 FP I7 Function Hardwired to Stores into it are just ignored Holds global variables Holds parameters to the procedure being called Stack pointer Scratch register Holds local variables for the current procedure Holds incoming parameters Pointer to the base of the current stack frame Holds return address for the current procedure Figure 5-4 The UltraSPARC II’s general registers CuuDuongThanCong.com https://fb.com/tailieudientucntt R0 R1 G0 G1 Global G0 G1 Global R7 G7 R8 O0 Global … … … G7 … … … R7 R0 R1 Global CWP = … … Alternative name R13 R14 R15 O5 SP O7 Stack pointer Temporary R16 L0 Local … … … CWP = R8 O0 Outgoing parmeter Local R24 I0 Incoming parameter Outgoing parmeter Stack pointer Temporary R16 L0 Local … … … R23 L7 Local R24 10 Incoming parameter … … Incoming parmeter Frame pointer Return address (a) Overlap R29 R30 R31 CWP decremented on call in this direction I5 FP I7 … OS SP O7 I5 FP I7 L7 … … … … R13 R14 R15 R29 R30 R31 R23 Incoming parmeter Frame pointer Return address Part of previous window Part of previous window (b) Figure 5-5 Operation of the UltraSPARC II register windows CuuDuongThanCong.com https://fb.com/tailieudientucntt Type Signed integer Unsigned integer Binary coded decimal integer Floating point Bits × × × 16 Bits × × 32 Bits × × 64 Bits × × Figure 5-6 The Pentium II numeric data types Supported types are marked with × CuuDuongThanCong.com https://fb.com/tailieudientucntt 128 Bits Type Signed integer Unsigned integer Binary coded decimal integer Floating point Bits × × 16 Bits × × 32 Bits × × 64 Bits × × 128 Bits × × × Figure 5-7 The UltraSPARC II numeric data types CuuDuongThanCong.com https://fb.com/tailieudientucntt Type Signed integer Unsigned integer Binary coded decimal integer Floating point Bits × 16 Bits × 32 Bits × 64 Bits × × × Figure 5-8 The JVM numeric data types CuuDuongThanCong.com https://fb.com/tailieudientucntt 128 Bits OPCODE (a) OPCODE ADDRESS1 ADDRESS2 (c) OPCODE ADDRESS (b) OPCODE ADDR1 ADDR2 ADDR3 (d) Figure 5-9 Four common instruction formats: (a) Zeroaddress instruction (b) One-address instruction (c) Twoaddress instruction (d) Three-address instruction CuuDuongThanCong.com https://fb.com/tailieudientucntt Program counter Program counter Jumps Time Time (a) (b) Figure 5-37 Program counter as a function of (smoothed) (a) Without branches (b) With branches CuuDuongThanCong.com time https://fb.com/tailieudientucntt Peg Peg Peg Figure 5-38 Initial configuration for the Towers of Hanoi problem for five disks CuuDuongThanCong.com https://fb.com/tailieudientucntt Initial state First move disks from peg to peg Then move disk from peg to peg Finally move disks from peg to peg Figure 5-39 The steps required to solve the Towers of Hanoi for three disks CuuDuongThanCong.com https://fb.com/tailieudientucntt public void towers(int n, int i, int j) { int k; if (n == 1) System.out.println("Move a disk from " + i + " to " + j); else { k = − i − j; towers(n − 1, i, k); towers(1, i, j); towers(n − 1, k, j); } } Figure 5-40 A procedure for solving the Towers of Hanoi CuuDuongThanCong.com https://fb.com/tailieudientucntt Address FP k Old FP = 1000 Return addr j=2 i=1 n=2 k=2 Old FP Return addr j=3 i=1 n=3 k Old FP = 1024 Return addr j=3 i=1 n=1 k=3 Old FP = 1000 Return addr j=2 i=1 n=2 k=2 Old FP Return addr j=3 i=1 n=3 FP k=3 Old FP = 1000 Return addr j=2 i=1 n=2 k=2 Old FP Return addr j=3 i=1 n=3 k=3 Old FP = 1024 Return addr j=2 i=1 n=1 k=3 Old FP = 1000 Return addr j=2 i=1 n=2 k=2 Old FP Return addr j=3 i=1 n=3 (b) (c) (d) (e) SP SP SP FP FP k Old FP Return addr j=3 i=1 n=3 (a) SP Figure 5-41 The stack at several points during the execution of Fig 5-40 CuuDuongThanCong.com https://fb.com/tailieudientucntt 1068 1064 1060 1056 1052 1048 1044 1040 1036 1032 1028 1024 1020 1016 1012 1008 1004 1000 A called from main program (a) (b) Calling procedure Called procedure CALL LL CA RE TU RN RETU CA LL RN RN U ET R A returns to main program Figure 5-42 When a procedure is called, execution of the procedure always begins at the first statement of the procedure CuuDuongThanCong.com https://fb.com/tailieudientucntt (a) A called from main program (b) B RESUME RESUME A B RESUME RESU ME A EB RESUM RE SU ME A A returns to main program Figure 5-43 When a coroutine is resumed, execution begins at the statement where it left off the previous time, not at the beginning CuuDuongThanCong.com https://fb.com/tailieudientucntt Disk interrupt priority held pending RS232 ISR finishes disk interrupt occurs RS232 interrupt priority Disk ISR finishes Printer interrupt priority Printer ISR finishes 10 15 User Printer program ISR User 20 25 35 40 RS232 ISR Disk ISR Printer ISR User Printer User Printer User User program Time Stack Figure 5-44 Time sequence of multiple interrupt example CuuDuongThanCong.com https://fb.com/tailieudientucntt .586 ; compile for Pentium (as opposed to 8088 etc.) MODEL FLAT PUBLIC towers ; export ’towers’ EXTERN printf:NEAR ; import printf CODE towers: PUSH EBP; save EBP (frame pointer) MOV EBP, ESP ; set new frame pointer above ESP CMP [EBP+8], ; if (n == 1) JNE L1 ; branch if n is not MOV EAX, [EBP+16] ; printf(" ", i, j); PUSH EAX ; note that parameters i, j and the format MOV EAX, [EBP+12] ; string are pushed onto the stack PUSH EAX ; in reverse order This is the C calling convention PUSH OFFSET FLAT:format; offset flat means the address of format CALL printf ; call printf ADD ESP, 12 ; remove params from the stack JMP Done ; we are finished L1: MOV EAX, ; start k = − i − j SUB EAX, [EBP+12] ; EAX = − i SUB EAX, [EBP+16] ; EAX = − i − j MOV [EBP+20], EAX ; k = EAX PUSH EAX ; start towers(n − 1, i, k) MOV EAX, [EBP+12] ; EAX = i PUSH EAX ; push i MOV EAX, [EBP+8] ; EAX = n DEC EAX ; EAX = n − PUSH EAX ; push n − CALL towers ; call towers(n − 1, i, − i − j) ADD ESP, 12 ; remove params from the stack MOV EAX, [EBP+16] ; start towers(1, i, j) PUSH EAX ; push j MOV EAX, [EBP+12] ; EAX = i PUSH EAX ; push i PUSH ; push CALL towers ; call towers(1, i, j) ADD ESP, 12 ; remove params from the stack MOV EAX, [EBP+12] ; start towers(n − 1, − i − j, i) PUSH EAX ; push i MOV EAX, [EBP+20] ; push 20 PUSH EAX ; push k MOV EAX, [EBP+8] ; EAX = n DEC EAX ; EAX = n−1 PUSH EAX ; push n − CALL towers ; call towers(n − 1, − i − j, i) ADD ESP, 12 ; adjust stack pointer Done: LEAVE ; prepare to exit RET ; return to the caller DATA format DB "Move disk from %d to %d\n"; format string END Figure 5-45 The Towers of Hanoi for the Pentium II CuuDuongThanCong.com https://fb.com/tailieudientucntt #define N %i0 #define I %i1 #define J %i2 #define K %l0 #define Param0 %o0 #define Param1 %o1 #define Param2 %o2 #define Scratch %l1 proc 04 global towers /* N is input parameter */ /* I is input parameter */ /* J is input parameter */ /* K is local variable */ /* Param0 is output parameter */ /* Param1 is output parameter */ /* Param2 is output parameter */ /* as an aside, cpp uses the C comment convention */ towers: cmp N, bne Else save %sp, −112, %sp ! if (n == 1) ! if (n != 1) goto Else sethi %hi(format), Param0 ! printf("Move a disk from %d to %d\n", i, j) or Param0, %lo(format), Param0! Param0 = address of format string mov I, Param1 ! Param1 = i call printf ! call printf BEFORE parameter (j) is set up mov J, Param2 ! use the delay slot after call to set up parameter b Done ! we are done now nop ! fill delay slot Else: mov 6, K sub K, J, K sub K, I, K ! start k = −i − j !k=6−j !k=6−i−j add N, −1, Scratch mov Scratch, Param0 mov I, Param1 call towers mov K, Param2 ! start towers(n − 1, i, k) ! Scratch = N − ! parameter = i ! call towers BEFORE parameter (k) is set up ! use the delay slot after call to set up parameter mov 1, Param0 mov I, Param1 call towers mov J, Param2 ! start towers(1, i, j) ! parameter = i ! call towers BEFORE parameter (j) is set up ! parameter = j mov Scratch, Param0 mov K, Param1 call towers mov J, Param2 ! start towers(n − 1, k, j) ! parameter = k ! call towers BEFORE parameter (j) is set up ! parameter = j Done: ret restore ! return ! use the delay slot after ret to restore windows format: asciz "Move a disk from %d to %d\n" Figure 5-46 The Towers of Hanoi for the UltraSPARC II CuuDuongThanCong.com https://fb.com/tailieudientucntt L1: ILOAD ICONST IF ICMPNE L1 // local = n; push n // push // if (n != 1) goto L1 GETSTATIC #13 NEW #7 DUP LDC #2 INVOKESPECIAL #10 ILOAD INVOKEVIRTUAL #11 LDC #1 INVOKEVIRTUAL #12 ILOAD INVOKEVIRTUAL #11 INVOKEVIRTUAL #15 INVOKEVIRTUAL #14 RETURN // n == 1; this code handles the println statement // allocate buffer for the string to be built // duplicate the pointer to the buffer // push pointer to string "move a disk from " // copy the string to the buffer // push i // convert i to string and append to the new buffer // push pointer to string " to " // append this string to the buffer // push j // convert j to string and append to buffer // string conversion // call println // return from towers BIPUSH ILOAD ISUB ILOAD ISUB ISTORE // Else part: compute k = − i − j // local = i; push i // top-of-stack = − i // local = j; push j // top-of-stack = − i − j // local = k = − i − j; stack is now empty ILOAD ICONST ISUB ILOAD ILOAD INVOKESTATIC #16 // start working on towers(n − 1, i, k); push n // push // top-of-stack = n − // push i // push k // call towers(n − 1, 1, k) ICONST ILOAD ILOAD INVOKESTATIC #16 // start working on towers(1, i, j); push // push i // push j // call towers(1, i, j) ILOAD ICONST ISUB ILOAD ILOAD INVOKESTATIC #16 RETURN // start working on towers(n − 1, k, j); push n // push // top-of-stack = n − // push k // push j // call towers(n − 1, k, j) // return from towers Figure 5-47 The Towers of Hanoi for JVM CuuDuongThanCong.com https://fb.com/tailieudientucntt INSTRUCTION INSTRUCTION INSTRUCTION TEMPLATE INSTRUCTION INSTRUCTION INSTRUCTION TEMPLATE INSTRUCTION INSTRUCTION INSTRUCTION TEMPLATE R1 R2 Instructions can be chained together R3 PREDICATE REGISTER Figure 5-48 IA-64 is based on bundles of three instructions CuuDuongThanCong.com https://fb.com/tailieudientucntt if (R1 == 0) R2 = R3; CMP R1,0 BNE L1 MOV R2,R3 CMOVZ R2,R3,R1 L1: (a) (b) (c) Figure 5-49 (a) An if statement (b) Generic assembly code for (a) (c) A conditional instruction CuuDuongThanCong.com https://fb.com/tailieudientucntt if (R1 == 0) { R2 = R3; R4 = R5; } else { R6 = R7; R8 = R9; } (a) CMP R1,0 BNE L1 MOV R2,R3 MOV R4.R5 BR L2 L1: MOV R6,R7 MOV R8,R9 L2: (b) CMOVZ R2,R3,R1 CMOVZ R4,R5,R1 CMOVN R6,R7,R1 CMOVN R8,R9,R1 (c) Figure 5-50 (a) An if statement (b) Generic assembly code for (a) (c) Conditional execution CuuDuongThanCong.com https://fb.com/tailieudientucntt if (R1 == R2) R3 = R4 + R5; else R6 = R4 − R5 (a) CMP R1,R2 BNE L1 MOV R3,R4 BR L2 L1: MOV R6,R4 SUB R6,R5 L2: (b) CMPEQ R1,R2,P4 ADD R3,R4,R5 SUB R6,R4,R5 ADD R3,R5 (c) Figure 5-51 (a) An if statement (b) Generic assembly code for (a) (c) Predicated execution CuuDuongThanCong.com https://fb.com/tailieudientucntt ... Word Instruction Instruction Instruction Instruction Instruction Instruction Instruction Instruction Instruction Instruction Instruction Instruction (a) (b) Word Instruction Instruction Instr Instruction. .. M[EAX + OFFSET8] M[ECX + OFFSET8] M[EDX + OFFSET8] M[EBX + OFFSET8] SIB with OFFSET8 M[EBP + OFFSET8] M[ESI + OFFSET8] M[EDI + OFFSET8] 10 M[EAX + OFFSET32] M[ECX + OFFSET32] M[EDX + OFFSET32] M[EBX... done, so continue Figure 5- 17 A generic assembly program for computing the sum of the elements of an array CuuDuongThanCong .com https://fb .com/ tailieudientucntt MOV R1,#0 ; accumulate the OR in

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