A computer system consists of hardware, system programs, and application programs figs 4

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A computer system consists of hardware, system programs, and application programs figs 4

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THE SECURITY ENVIRONMENT 9.2 BASICS OF CRYPTOGRAPHY 9.3 USER AUTHENTICATION 9.4 ATTACKS FROM INSIDE THE SYSTEM 9.5 ATTACKS FROM OUTSIDE THE SYSTEM 9.6 PROTECTION MECHANISMS 9.7 TRUSTED SYSTEMS 9.8 RESEARCH ON SECURITY 9.9 SUMMARY

4 MEMORY MANAGEMENT 4.1 BASIC MEMORY MANAGEMENT 4.2 SWAPPING 4.3 VIRTUAL MEMORY 4.4 PAGE REPLACEMENT ALGORITHMS 4.5 MODELING PAGE REPLACEMENT ALGORITHMS 4.6 DESIGN ISSUES FOR PAGING SYSTEMS 4.7 IMPLEMENTATION ISSUES 4.8 SEGMENTATION 4.9 RESEARCH ON MEMORY MANAGEMENT 4.10 SUMMARY (a) (b) (c) 0xFFF … 000 User program User program User program Operating system in RAM Operating system in RAM Operating system in ROM Device drivers in ROM Fig. 4-1. Three simple ways of organizing memory with an operat- ing system and one user process. Other possibilities also exist. (a) Multiple input queues Partition 4 Partition 3 Partition 2 Partition 1 Operating system Partition 4 Partition 3 Partition 2 Partition 1 Operating system 700K 400K 100K 0 (b) Single input queue 200K 800K Fig. 4-2. (a) Fixed memory partitions with separate input queues for each partition. (b) Fixed memory partitions with a single input queue. 50% I/O wait 80% I/O wait 20% I/O wait 100 80 60 40 20 123456789100 Degree of multiprogramming CPU utilization (in percent) Fig. 4-3. CPU utilization as a function of the number of processes in memory. Job Arrival time CPU minutes needed 1 2 3 4 10:00 10:10 10:15 10:20 4 3 2 2 CPU idle CPU busy CPU/process .80 .20 .20 .64 .36 .18 .51 .49 .16 .41 .59 .15 1 2 3 4 0 100 15 20 22 27.6 28.2 31.7 2.0 .9 .9 .8 .8 .8 .3 .3 .3 .3 .9 .9 .9 .1 .1 .7 Job 2 starts 1234 # Processes (a) (c) (b) Time (relative to job 1's arrival) Job 1 finishes Fig. 4-4. (a) Arrival and work requirements of four jobs. (b) CPU utilization for 1 to 4 jobs with 80 percent I/O wait. (c) Sequence of events as jobs arrive and finish. The numbers above the hor- izontal lines show how much CPU time, in minutes, each job gets in each interval. (a) Operating system A (b) Operating system A B (c) Operating system A B C (d) Time Operating system B C (e) D Operating system B C (f) D Operating system C (g) D Operating system A C Fig. 4-5. Memory allocation changes as processes come into memory and leave it. The shaded regions are unused memory. (a) (b) Operating system Room for growth Room for growth B-Stack A-Stack B-Data A-Data B-Program A-Program Operating system Room for growth B A Actually in use Room for growth Actually in use Fig. 4-6. (a) Allocating space for a growing data segment. (b) Allocating space for a growing stack and a growing data seg- ment. (a) (b) (c) ABCDE 81624 Hole Starts at 18 Length 2 Process P05 H53 P86 P144 H182 P206 P263 H293 X 1 1 1 1 1 0 0 0 1 1 1 1 1 1 1 1 1 1 0 0 1 1 1 1 1 1 1 1 1 0 0 0 Fig. 4-7. (a) A part of memory with five processes and three holes. The tick marks show the memory allocation units. The shaded regions (0 in the bitmap) are free. (b) The corresponding bitmap. (c) The same information as a list. becomes becomes becomes becomes (a) A X B (b) A X (c) X B (d) X Before X terminates AB A B After X terminates Fig. 4-8. Four neighbor combinations for the terminating process, X. CPU package CPU The CPU sends virtual addresses to the MMU The MMU sends physical addresses to the memory Memory management unit Memory Disk controller Bus Fig. 4-9. The position and function of the MMU. Here the MMU is shown as being a part of the CPU chip because it commonly is nowadays. However, logically it could be a separate chip and was in years gone by. [...]... A0 A1 A2 A3 A4 A5 B0 B1 B2 B3 B4 B5 B6 C1 C2 C3 (a) Age 10 7 5 4 6 3 9 4 6 2 5 6 12 3 5 6 A0 A1 A2 A3 A4 A6 B0 B1 B2 B3 B4 B5 B6 C1 C2 C3 A0 A1 A2 A3 A4 A5 B0 B1 B2 A6 B4 B5 B6 C1 C2 C3 (b) (c) Fig 4- 28 Local versus global page replacement (a) Original configuration (b) Local page replacement (c) Global page replacement Page faults/sec A B Number of page frames assigned Fig 4- 29 Page fault rate as... operand } Second operand Fig 4- 32 An instruction causing a page fault Main memory Disk Main memory Pages 0 Disk Pages 3 Swap area 0 3 4 6 Swap area 7 4 6 5 2 1 Page table 7 5 2 1 Page table 6 6 4 3 4 3 0 0 (a) Disk map (b) Fig 4- 33 (a) Paging to a static swap area (b) Backing up pages dynamically 3 Request page Main memory User space User process Disk External pager 4 Page arrives 2 Needed page 5... rate as a function of the number of page frames assigned Single address space I space 232 Data Program D space 232 ;; ;; ;; ;; Unused page Data Program 0 (a) 0 (b) Fig 4- 30 (a) One address space (b) Separate I and D spaces Process table Program Data 1 Data 2 Page tables Fig 4- 31 Two processes sharing the same program sharing its page table MOVE.L #6 (A1 ), 2 (A0 ) 16 Bits 1000 1002 MOVE 6 10 04 2 } Opcode... page Virtual page Page frame Fig 4- 15 Comparison of a traditional page table with an inverted page table Page loaded first 0 3 7 8 12 14 15 18 A B C D E F G Most recently loaded page H (a) 3 7 8 12 14 15 18 20 B C D E F G H A is treated like a newly loaded page A (b) Fig 4- 16 Operation of second chance (a) Pages sorted in FIFO order (b) Page list if a page fault occurs at time 20 and A has its R bit... Here is page 1 Page fault Kernel space Fault handler 6 Map page in MMU handler Fig 4- 34 Page fault handling with an external pager Virtual address space Call stack Free Address space allocated to the parse tree Parse tree Space currently being used by the parse tree Constant table Source text Symbol table Symbol table has bumped into the source text table Fig 4- 35 In a one-dimensional address space with...Virtual address space 60K-64K X 56K-60K X 52K-56K X 48 K-52K X 44 K -48 K 7 40 K -44 K X 36K -40 K 5 32K-36K X Physical memory address 28K-32K X 28K-32K 24K-28K X 24K-28K 20K-24K 3 20K-24K 16K-20K 4 16K-20K 12K-16K 0 12K-16K 8K-12K 6 8K-12K 4K-8K 1 4K-8K 0K-4K 2 Virtual page 0K-4K Page frame Fig 4- 10 The relation between virtual addresses and physical memory addresses is given by the page table 1 1 0... operation of the MMU with 16 4- KB pages Second-level page tables Page table for the top 4M of memory Top-level page table 1023 Bits 10 PT1 10 12 PT2 Offset (a) 6 5 4 3 2 1 0 1023 6 5 4 3 2 1 0 (b) Fig 4- 12 (a) A 32-bit address with two page table fields (b) Two-level page tables To pages Modified ; ; Caching disabled Present/absent Referenced Protection Fig 4- 13 A typical page table entry Page frame number... Valid 1 1 1 1 1 1 1 1 Virtual page Modified Protection Page frame 140 1 RW 31 20 0 R X 38 130 1 RW 29 129 1 RW 62 19 0 R X 50 21 0 R X 45 860 1 RW 14 861 1 RW 75 Fig 4- 14 A TLB to speed up paging Traditional page table with an entry for each of the 252 pages 52 -1 2 256-MB physical memory has 216 4- KB page frames 216 -1 0 0 Indexed by virtual page Hash table 216 -1 0 Indexed by hash on virtual page... 20 84 1 2020 1 2003 1 1980 1 Time of last use 1980 1 (b) 1620 0 1620 0 2032 1 2020 1 2003 1 1980 1 20 14 0 1213 0 (c) 20 14 0 1213 0 R bit (a) 20 84 1 2020 1 2003 1 20 14 1 1213 0 2032 1 20 84 1 2032 1 20 84 1 2020 1 2003 1 1980 1 20 14 0 22 04 1 New page (d) Fig 4- 22 Operation of the WSClock algorithm (a) and (b) give an example of what happens when R = 1 (c) and (d) give an example of R = 0 Algorithm Optimal... algorithm Fig 4- 23 Page replacement algorithms discussed in the text All pages frames initially empty 1 1 0 P Youngest page 0 0 P Oldest page 2 2 1 0 P 3 3 2 1 P 0 0 3 2 P 1 1 0 3 P 4 4 1 0 P 0 4 1 0 1 4 1 0 2 2 4 1 P 3 3 2 4 P 4 3 2 4 2 2 1 0 4 P 3 3 2 1 0 P 4 4 3 2 1 P 10 Page faults 9 Page faults (a) 1 1 0 2 2 1 0 P P Youngest page 0 0 P Oldest page 3 3 2 1 0 P 0 3 2 1 0 1 3 2 1 0 4 0 4 0 3 4 2 3 1 2 . growth B A Actually in use Room for growth Actually in use Fig. 4-6. (a) Allocating space for a growing data segment. (b) Allocating space for a growing stack and a growing data seg- ment. (a) (b). virtual page 0 Indexed by hash on virtual page Virtual page Page frame Fig. 4-15. Comparison of a traditional page table with an inverted page table. (a) Page loaded first Most recently loaded page 0 A 3 B 7 C 8 D 12 E 14 F 15 G 18 H (b) A. into memory and leave it. The shaded regions are unused memory. (a) (b) Operating system Room for growth Room for growth B-Stack A- Stack B-Data A- Data B-Program A- Program Operating system Room

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